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On-Chip Digital Jitter Measurement, from Megahertz to Gigahertz
July/August 2004 (vol. 21 no. 4)
pp. 314-321
Stephen Sunter, LogicVision
Aubin Roy, LogicVision
One of the challenges of testing at multiGbps rates is jitter characterization. This article introduces a new technique that allows for attaining on-chip measurements at a substantial level of accuracy. The authors propose new algorithms that allow a wide frequency range, supporting the desired accuracy while guaranteeing signal integrity and low overhead.
Citation:
Stephen Sunter, Aubin Roy, "On-Chip Digital Jitter Measurement, from Megahertz to Gigahertz," IEEE Design & Test of Computers, vol. 21, no. 4, pp. 314-321, July-Aug. 2004, doi:10.1109/MDT.2004.38
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