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Jitter Models for the Design and Test of Gbps-Speed Serial Interconnects
July/August 2004 (vol. 21 no. 4)
pp. 302-313
Nelson Ou, University of British Columbia
Touraj Farahmand, University of British Columbia
Andy Kuo, University of British Columbia
Sassan Tabatabaei, University of British Columbia
Andr? Ivanov, University of British Columbia
Gigabit data rates in high-speed interconnects require careful modeling of jitter and its effect on the bit error rates. This article presents a comprehensive analysis of jitter causes and types, and develops accurate jitter models for design and test of high-speed interconnects.
Citation:
Nelson Ou, Touraj Farahmand, Andy Kuo, Sassan Tabatabaei, Andr? Ivanov, "Jitter Models for the Design and Test of Gbps-Speed Serial Interconnects," IEEE Design & Test of Computers, vol. 21, no. 4, pp. 302-313, July-Aug. 2004, doi:10.1109/MDT.2004.34
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