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Issue No.02 - March/April (2004 vol.21)
pp: 94-101
Carl Scafidi , Intel
J. Douglas Gibson , Hewlett-Packard
Rohit Bhatia , Hewlett-Packard
As modern microprocessor designs become increasingly complex, certain units often receive less coverage than others during full-chip functional verification. A stable RTL model does not necessarily indicate that all units are equally stable. The authors illustrate the need for unit-level functional verification and present an effective methodology for verifying the XPN unit in the Itanium 2 microprocessor.
Carl Scafidi, J. Douglas Gibson, Rohit Bhatia, "Validating the Itanium 2 Exception Control Unit: A Unit-Level Approach", IEEE Design & Test of Computers, vol.21, no. 2, pp. 94-101, March/April 2004, doi:10.1109/MDT.2004.1277901
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