This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Implementation of a Self-Timed Segmented Bus
November/December 2003 (vol. 20 no. 6)
pp. 44-50
Juha Plosila, University of Turku
Tiberiu Seceleanu, University of Turku
Pasi Liljeberg, University of Turku

Editor's note:The authors propose an asynchronous structure for implementation on a SoC. An intersegment topological arrangement preserves parallelization and, through a so-called central arbiter, efficiently organizes communication with high signaling speed in the proposed structure.

—Fabrizio Lombardi, Northeastern University

Citation:
Juha Plosila, Tiberiu Seceleanu, Pasi Liljeberg, "Implementation of a Self-Timed Segmented Bus," IEEE Design & Test of Computers, vol. 20, no. 6, pp. 44-50, Nov.-Dec. 2003, doi:10.1109/MDT.2003.1246163
Usage of this product signifies your acceptance of the Terms of Use.