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Issue No.03 - May/June (2003 vol.20)
pp: 58-66
Yervant Zorian , Virage Logic
ABSTRACT
<p><em>Editor?s note:</em><div>Today?s complex SoCs need sophisticated infrastructure IP, not only to test and diagnose embedded memories but also to repair them and improve fabrication yield. The authors? solution integrates memory IP with test and repair IP in a composite infrastructure IP that ensures manufacturing and field repair efficiency and optimizes SoC yield.</div><div>--Paolo Prinetto, Politecnico di Torino</div></p>
CITATION
Yervant Zorian, "Embedded-Memory Test and Repair: Infrastructure IP for SoC Yield", IEEE Design & Test of Computers, vol.20, no. 3, pp. 58-66, May/June 2003, doi:10.1109/MDT.2003.1198687
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