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Issue No.01 - January/February (2003 vol.20)
pp: 26-33
Jong-eun Lee , Seoul National University
Kiyoung Choi , Seoul National University
Nikil D. Dutt , University of California, Irvine
ABSTRACT
<p>Coarse-grained reconfigurable architectures can enhance the performance of critical loops and computation-intensive functions. Such architectures need efficient compilation techniques to map algorithms onto customized architectural configurations. A new compilation approach uses a generic reconfigurable architecture to tackle the memory bottleneck that typically limits the performance of many applications.</p>
CITATION
Jong-eun Lee, Kiyoung Choi, Nikil D. Dutt, "Compilation Approach for Coarse-Grained Reconfigurable Architectures", IEEE Design & Test of Computers, vol.20, no. 1, pp. 26-33, January/February 2003, doi:10.1109/MDT.2003.1173050
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