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Behavioral Simulation of Fractional-N Frequency Synthesizers and Other PLL Circuits
July/August 2002 (vol. 19 no. 4)
pp. 74-83

Two techniques are presented that allow fast and accurate simulation of fractional-N synthesizers. A uniform time step allows implementation of these techniques in various simulationframeworks, such as Verilog, Matlab, and C or C++ programs. The techniques are also applicable to the simulation of other PLL systems, such as clock and data recovery circuits.Fractional-N Frequency Synthersizers provide high-speed frequency sources that can be accurately set with very high resolution--avaluable feature or many communication systems.

Citation:
Michael H. Perrott, "Behavioral Simulation of Fractional-N Frequency Synthesizers and Other PLL Circuits," IEEE Design & Test of Computers, vol. 19, no. 4, pp. 74-83, July-Aug. 2002, doi:10.1109/MDT.2002.1018136
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