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A Two-Input, One-Output Bit-Scalable Architecture for Fuzzy Processors
July/August 2001 (vol. 18 no. 4)
pp. 56-64
Several proposed hardware architectures for fuzzy processors satisfy real-time requirements, but very few are suitable for automatic synthesis. This bit-scalable architecture allows automatic synthesis of fuzzy processors of various bit-wide
Citation:
Roberto d'Amore, Osamu Saotome, Karl Heinz Kienitz, "A Two-Input, One-Output Bit-Scalable Architecture for Fuzzy Processors," IEEE Design & Test of Computers, vol. 18, no. 4, pp. 56-64, July-Aug. 2001, doi:10.1109/54.936249
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