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| Subhasish Mitra, LaNae J. Avra, Edward J. McCluskey, "Efficient Multiplexer Synthesis Techniques," IEEE Design & Test of Computers, vol. 17, no. 4, pp. 90-97, October-December, 2000. | |||
| BibTex | x | ||
| @article{ 10.1109/54.895009, author = {Subhasish Mitra and LaNae J. Avra and Edward J. McCluskey}, title = {Efficient Multiplexer Synthesis Techniques}, journal ={IEEE Design & Test of Computers}, volume = {17}, number = {4}, issn = {0740-7475}, year = {2000}, pages = {90-97}, doi = {http://doi.ieeecomputersociety.org/10.1109/54.895009}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Design & Test of Computers TI - Efficient Multiplexer Synthesis Techniques IS - 4 SN - 0740-7475 SP90 EP97 EPD - 90-97 A1 - Subhasish Mitra, A1 - LaNae J. Avra, A1 - Edward J. McCluskey, PY - 2000 VL - 17 JA - IEEE Design & Test of Computers ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.895009
A heuristic algorithm synthesizes efficient multiplexers consisting of a multiplexer component tree from a technology library. The synthesized multiplexer structures are more area and delay efficient than those generated by commercial tools.
Citation:
Subhasish Mitra, LaNae J. Avra, Edward J. McCluskey, "Efficient Multiplexer Synthesis Techniques," IEEE Design & Test of Computers, vol. 17, no. 4, pp. 90-97, Oct.-Dec. 2000, doi:10.1109/54.895009
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