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An Automatic Controller Extractor for HDL Descriptions at the RTL
July-September 2000 (vol. 17 no. 3)
pp. 72-77

Extracting controlling finite-state machines can significantly reduce state space and thereby speed functional verification. The controller extraction algorithm uses an approach that frees it from restrictions on HDL code writing style.

Citation:
Chien-Nan Jimmy Liu, Jing-Yang Jou, "An Automatic Controller Extractor for HDL Descriptions at the RTL," IEEE Design & Test of Computers, vol. 17, no. 3, pp. 72-77, July-Sept. 2000, doi:10.1109/54.867897
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