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Issue No.02 - April-June (2000 vol.17)
pp: 101-110
ABSTRACT
<p>The Hierarchical Energy Analysis Tool lets designers quickly estimate power consumption of various data-path architectures, enabling a power consumption comparison at a high level before the layout design is carried out.</p>
CITATION
Janardhan H. Satyanarayana, Keshab K. Parhi, "Power Estimation of Digital Data Paths Using HEAT", IEEE Design & Test of Computers, vol.17, no. 2, pp. 101-110, April-June 2000, doi:10.1109/54.844339
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