Issue No.04 - October-December (1999 vol.16)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.808225
This article presents a novel approach to analog DFT, based on wide-band undersampling techniques similar to those used in sampling oscilloscopes and mixed signal IC testers. What is unique is that multiple samplers are constructed on-chip, where the signals being tested can be mixed down to a lower frequency before being brought off-chip. Using this approach the frequency response limitations of the off-chip driver can be avoided and access to multiple internal nodes can be provided with only a few external pins. Other advantages include small silicon overhead, low power consumption, and potential for automated analog DFT. We illustrated the utility of the procedure by measuring the frequency response, slew rate, and transient response characteristics for an on-chip unity gain CMOS operation amplifier.
Ralph Mason, Shing Ma, "Analog DFT Using an Undersampling Technique", IEEE Design & Test of Computers, vol.16, no. 4, pp. 84-88, October-December 1999, doi:10.1109/54.808225