Issue No.02 - April-June (1999 vol.16)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.765203
Electronics products of the future must be realized efficiently promising higher performance at lower cost within much shorter product design and upgrade cycles. ASIC foundries and EDA vendors see increasing VLSI integration capabilities as a promising new business opportunity through the System-on-Chip (SOC) paradigm that extends ASICs design from the component level to the system level. The systems integration community and electronics packaging design vendors see the systems market as an extension of their current business, the so-called Systems-on-Package (SOP) paradigm, and one that raises their role to new level of importance in the product supply chain linking electronics packaging directly to product specification, early design and ASIC design. Political issues aside, there exist technical, legal, and business challenges both paradigms must overcome to find broad-based acceptance. In the authors' opinion, the Systems-on-Package (SOP) paradigm promises a higher return on investment (ROI) at a much lower risk for the electronics products design, well into the new millenium.
Rao R. Tummala, Vijay K. Madisetti, "System on Chip or System on Package?", IEEE Design & Test of Computers, vol.16, no. 2, pp. 48-56, April-June 1999, doi:10.1109/54.765203