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Issue No.01 - January-March (1999 vol.16)
pp: 53-58
ABSTRACT
This paper describes circuitry for facilitating the test of embedded DRAM macro whose configuration can be easily changed (reconfigurable macro). It is difficult to use conventional direct access mode circuitry, because the configuration of embedded DRAMs on a chip is varied for each product, and therefor the test circuitry should be customized for each product. The proposed test circuits implemented in the macro provide a Universal Test Interface regardless of the DRAM configuration and the number of macros on a chip.
INDEX TERMS
Embedded DRAM, Direct Access Mode, Universal Test Interface, BIST
CITATION
Shinji Miyano, Katsuhiko Sato, Kenji Numata, "Universal Test Interface for Embedded-DRAM Testing", IEEE Design & Test of Computers, vol.16, no. 1, pp. 53-58, January-March 1999, doi:10.1109/54.748805
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