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Using Laser Defect Avoidance to Build Large-Area FPGAs
October-December 1998 (vol. 15 no. 4)
pp. 75-81
Chip defect densities set the complexity limits of FPGAs. However, wafer-scale techniques expand this with defect avoidance routing around flawed blocks to build working systems. FPGAs have the features required for successful defect avoidance systems: repeatable cells, built-in switchable flexible routing, and potentially large number of applications. Laser-formed connections/cuts switches are effective in bypassing fabrication time defects in cell power, clocks, and signal buses, thus creating defect-free large working systems. Experiments on test FPGAs show laser defect avoidance routing signal delays 50% those of active switches. Thus laser defect avoidance after fabrication eliminates errors creating large-area FPGAs whose defective cell distribution is nearly unseen by the user.
Index Terms:
FPGA, defect avoidance, laser linking, laser redundancy, IC yield improvement
Citation:
Glenn H. Chapman, Benoit Dufort, "Using Laser Defect Avoidance to Build Large-Area FPGAs," IEEE Design & Test of Computers, vol. 15, no. 4, pp. 75-81, Oct.-Dec. 1998, doi:10.1109/54.735930
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