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Test Development for Second-Generation ColdFire Microprocessors
July-September 1998 (vol. 15 no. 3)
pp. 70-76
A case study of the development of the design for test methodology of the second generation of the ColdFire(r) Microprocessor family is described from the viewpoint of goals, initial strategy, and implementation. Methodology includes at-speed scan path design, path delay testing, IDDQ, and direct access test modes for embedded memories. Scan tests are applied with timing identical to that specified for peak performance normal operation.
Index Terms:
DFT, ColdFire, microprocessor design, scan tests
Citation:
Dale Amason, Alfred L. Crouch, Renny Eisele, Grady Giles, Michael Mateja, "Test Development for Second-Generation ColdFire Microprocessors," IEEE Design & Test of Computers, vol. 15, no. 3, pp. 70-76, July-Sept. 1998, doi:10.1109/54.706036
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