Issue No.03 - July-September (1998 vol.15)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.706035
This article describes the testability features and test pattern development methodologies for the AMD-K6 Microprocessor. The embedded Design for Testability (DFT) structures and test strategy provide high quality manufacturing tests.
AMD-K6, design for testability, test strategies, manufacturing costs
R. Scott Fetherston, Imtiaz P. Shaik, Siyad C. Ma, "Testability Features of the AMD-K6 Microprocessor", IEEE Design & Test of Computers, vol.15, no. 3, pp. 64-69, July-September 1998, doi:10.1109/54.706035