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| ASCII Text | x | ||
| Yuri V. Malyshenko, "Functional Fault Models for Analog Circuits," IEEE Design & Test of Computers, vol. 15, no. 2, pp. 80-85, April-June, 1998. | |||
| BibTex | x | ||
| @article{ 10.1109/54.679211, author = {Yuri V. Malyshenko}, title = {Functional Fault Models for Analog Circuits}, journal ={IEEE Design & Test of Computers}, volume = {15}, number = {2}, issn = {0740-7475}, year = {1998}, pages = {80-85}, doi = {http://doi.ieeecomputersociety.org/10.1109/54.679211}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Design & Test of Computers TI - Functional Fault Models for Analog Circuits IS - 2 SN - 0740-7475 SP80 EP85 EPD - 80-85 A1 - Yuri V. Malyshenko, PY - 1998 KW - Analog test KW - ICs KW - fault models KW - PCBs VL - 15 JA - IEEE Design & Test of Computers ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.679211
Fault models are introduced for analog components described on the functional level. Conditions for the output manifestation of functional faults are derived, with a spread in analog output values allowed for. The study made has shown that only the function of a faulty-free component may be used to select input test stimuli which should ensure the manifestation of its faults. The results obtained may be used to select test stimuli for analog printed-circuit board.
Index Terms:
Analog test, ICs, fault models, PCBs
Citation:
Yuri V. Malyshenko, "Functional Fault Models for Analog Circuits," IEEE Design & Test of Computers, vol. 15, no. 2, pp. 80-85, April-June 1998, doi:10.1109/54.679211
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