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A Core-Based System-to-Silicon Design Methodology
October-December 1997 (vol. 14 no. 4)
pp. 36-41
A system design to physical design methodology based on developing and integrating reusable "cores" was used to develop a complex 0.5-micron digital QAM demodulator/FEC decoder. This highly automated design flow encapsulates ESDA tools, logic synthesis and standard cell place and route tools into a Make/RCS environment that simplifies design complexity management and brings in physical design information early in the design cycle. This methodology enables a new style of design team organization in which each designer is responsible for all aspects of core development, from system level architecture through place and route and post-layout timing verification. This methodology facilitates design re-use and greatly reduces the cycle time of complex deep submicron designs.
Index Terms:
Core-based systems, systems on a chip, design flow, deep-submicron design
Citation:
Frank S. Eory, "A Core-Based System-to-Silicon Design Methodology," IEEE Design & Test of Computers, vol. 14, no. 4, pp. 36-41, Oct.-Dec. 1997, doi:10.1109/54.632879
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