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| Rolf Drechsler, Bernd Becker, Stefan Ruppertz, "The K*BMD: A Verification Data Structure," IEEE Design & Test of Computers, vol. 14, no. 2, pp. 51-59, April-June, 1997. | |||
| BibTex | x | ||
| @article{ 10.1109/54.587742, author = {Rolf Drechsler and Bernd Becker and Stefan Ruppertz}, title = {The K*BMD: A Verification Data Structure}, journal ={IEEE Design & Test of Computers}, volume = {14}, number = {2}, issn = {0740-7475}, year = {1997}, pages = {51-59}, doi = {http://doi.ieeecomputersociety.org/10.1109/54.587742}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Design & Test of Computers TI - The K*BMD: A Verification Data Structure IS - 2 SN - 0740-7475 SP51 EP59 EPD - 51-59 A1 - Rolf Drechsler, A1 - Bernd Becker, A1 - Stefan Ruppertz, PY - 1997 VL - 14 JA - IEEE Design & Test of Computers ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.587742
Circuit designers can efficiently verify designs at the bit and word levels in one graph-based data structure. The authors present the representation technique, manipulation algorithms for K*BMDs, and experimental results comparing them with other data structures.
Citation:
Rolf Drechsler, Bernd Becker, Stefan Ruppertz, "The K*BMD: A Verification Data Structure," IEEE Design & Test of Computers, vol. 14, no. 2, pp. 51-59, April-June 1997, doi:10.1109/54.587742
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