Issue No.01 - January-March (1997 vol.14)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.573365
Currently, a fully-equipped logic tester costs several million dollars more than a memory tester. If logic ICs could be tested in part on less-expensive memory testers, the benefits would be two-fold: significant cost savings and greatly increased productivity. This paper describes one method of converting certain types of tests traditionally performed by logic testers onto a memory test system. Using an innovative software tool called LOTOM (LOgic TO Memory) to convert logic test vectors into memory test patterns and to generate test programs, sample time savings of 99% (compared to doing the same job manually) have been achieved.
ALPG, LOTOM, LPAT, MPAT, LOC, memory test, logic-to-memory test conversion, IC test, product test
Robert Wu, Jerry Gerner, Richard Wheelus, Kevin Lew, "Testing Logic-Intensive Memory ICs on Memory Testers", IEEE Design & Test of Computers, vol.14, no. 1, pp. 50-54, January-March 1997, doi:10.1109/54.573365