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Issue No.01 - January-March (1997 vol.14)
pp: 18-24
ABSTRACT
<p>Yield is perhaps the single most important measure of manufacturing efficiency for large integrated circuits. To reduce product time-to-volume and accelerate continuous yield improvement, we have integrated memory test, defect mapping, and repair into the UltraSPARC microprocessor manufacturing flow.</p> <p>We use the UltraSPARC memory test port, together with standard memory test equipment and integrated software to detect, locate, and repair defects in the larger memory arrays. Pattern-recognized memory defect maps are collected for every chip manufactured, accelerating the understanding of defects and their causes. As part of the manufacturing process, we also program a unique identity into each chip that can be read electrically. In this article, we present the memory defect-mapping system that has been established and our use of that system to accelerate yield learning.</p>
INDEX TERMS
IC design, defect mapping, defect repair, embedded memory, UltraSPARC, manufacturing
CITATION
Lynn Youngs, "Mapping and Repairing Embedded-Memory Defects", IEEE Design & Test of Computers, vol.14, no. 1, pp. 18-24, January-March 1997, doi:10.1109/54.573354
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