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How ATE Planning Affects LSI Manufacturing Cost
Winter 1996 (vol. 13 no. 4)
pp. 66-73
The authors describe ATE planning effects on the total LSI manufacturing costs through simulation analysis, which uses a combination of the event-scheduling approach and detailed parametric models. They show that the method is useful in predicting the cost effects of ATE planning in the LSI manufacturing system.
Index Terms:
VLSI manufacturing system, test cost, LSI tester, evaluation
Citation:
Koji Nakamae, Homare Sakamoto, Hiromu Fujioka, "How ATE Planning Affects LSI Manufacturing Cost," IEEE Design & Test of Computers, vol. 13, no. 4, pp. 66-73, Winter 1996, doi:10.1109/54.544538
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