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Design&Test
1996
Issue No. 3 - Fall
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Bibliographic References
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IEEE Design & Test of Computers
Fall 1996 (vol. 13 no. 3)
ISSN: 0740-7475
Table of Contents
News
News
(Abstract)
pp. 4,109
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Panel Summaries
Panel Summaries
(Abstract)
Yervant Zorian
Tom Anderson
Yvon Savaria
Claude Thibeault
Andre Ivanov
pp. 6,110-112
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Conference Reports
Conference Reports
(Abstract)
Gil Philips
Yervant Zorian
Charles W. Rosenthal
Bozena Kaminska
pp. 8,113-144
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Features
Guest Editors' Introduction: Advances in Rapid Prototyping of Digital Systems
(HTML)
Vijay K. Madisetti
Mark A. Richards
pp. 9-11
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Rapid Digital System Prototyping: Current Practice, Future Challenges
(Abstract)
Vijay K. Madisetti
pp. 12-22
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RASSP: Changing the Paradigm of Electronic-System Design
(Abstract)
James H.M. Malley
pp. 23-31
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Spanning the Product Life Cycle: RASSP DFT
(Abstract)
Richard M. Sedmak
John S. Evans
pp. 32-42
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Hardware-Software Codesign Using Processor Synthesis
(Abstract)
Carolyn Kuttner
pp. 43-53
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Conceptual Prototyping of Scalable Embedded DSP Systems
(Abstract)
Lan-rong Dung
Vijay K. Madisetti
pp. 54-65
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Using VHDL for Board Level Simulation
(Abstract)
Sandi Habinc
Peter Sinander
pp. 66-78
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Special Features
Design for Testability in Hardware-Software Systems
(Abstract)
Harald P.e. Vranken
Marc F. Witteman
Ronald C. van WUIJTSWINKEL
pp. 79-87
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Computer-Aided Design of Fault-Tolerant VLSI Systems
(Abstract)
Ramesh Karri
Karin Hogstedt
Alex Orailoglu
pp. 88-96
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A D&T Special Report: P1149.4 Mixed-Signal Test Bus
(Abstract)
Adam Cron
pp. 98-101
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A D&T Roundtable: Deep-Submicron Test in cooperation with the Test Technology Technical Committee
(Abstract)
pp. 102-108
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DATC Newsletter
Design Automation Technical Committee Newsletter
(Abstract)
pp. 116-117
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TTTC Newsletter
Test Technology Tc Newsletter
(Abstract)
pp. 118-119
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Last Byte
How to achieve 95% fault coverage without really trying
(Abstract)
Scott Davidson
pp. 120
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