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Issue No.02 - Summer (1996 vol.13)
pp: 26-33
ABSTRACT
DC testing of analog circuits is inexpensive compared to AC testing and provides high coverage of many fault classes including some that are not detected by AC tests. It is also particularly effective in detecting catastrophic failures such as line opens and shorts. In this article, we present an efficient low-cost built-in self-test (BIST) methodology for linear analog circuits that is targeted towards faults that can be detected with DC tests. The methodology is based on the use of checksum encodings of matrix representations of the DC transfer function of the circuit under test (CUT). A small amount of circuitry called the checking circuitry is appended to the CUT for the purpose of on-chip fault detection. In test mode, DC stimulus is applied to the CUT via low-cost on-chip BIST circuitry. The presence of a non-zero signal at the output of the checking circuit indicates the presence of a fault.
INDEX TERMS
Built-in self-test, DC testing, Low cost, Checksums.
CITATION
Abhijit Chatterjee, Bruce C. Kim, Naveena Nagi, "DC Built-In Self-Test for Linear Analog Circuits", IEEE Design & Test of Computers, vol.13, no. 2, pp. 26-33, Summer 1996, doi:10.1109/54.500198
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