|
| This Article | ||
| ||
| Share | ||
| Bibliographic References | ||
| Add to: | ||
 Digg  Furl  Spurl  Blink  Simpy  Google  Del.icio.us  Y!MyWeb | ||
| Search | ||
| ||
| ASCII Text | x | ||
| Thomas Olbrich, Andrew Richardson, "Design and Self-Test for Switched-Current Building Blocks," IEEE Design & Test of Computers, vol. 13, no. 2, pp. 10-17, Summer, 1996. | |||
| BibTex | x | ||
| @article{ 10.1109/54.500196, author = {Thomas Olbrich and Andrew Richardson}, title = {Design and Self-Test for Switched-Current Building Blocks}, journal ={IEEE Design & Test of Computers}, volume = {13}, number = {2}, issn = {0740-7475}, year = {1996}, pages = {10-17}, doi = {http://doi.ieeecomputersociety.org/10.1109/54.500196}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Design & Test of Computers TI - Design and Self-Test for Switched-Current Building Blocks IS - 2 SN - 0740-7475 SP10 EP17 EPD - 10-17 A1 - Thomas Olbrich, A1 - Andrew Richardson, PY - 1996 KW - Switched-Current (SI) Design KW - Built-In Self-Test KW - BIST KW - Design-for-Testability KW - DfT KW - Fault Simulation KW - Testability VL - 13 JA - IEEE Design & Test of Computers ER - | |||
Switched-current designs are receiving increasing interest within the VLSI community as the technique allowing analogue functions to be implemented on a digital process. In addition, switched-current designs tend to be robust and compatible with the trend for reduced supply voltages. This article describes the design of a novel type of switched-current memory cell with a built-in-self-test option. The cell is digitally controlled and can be used as a building block for a range of analogue functions. A divide-by-two circuit for reference signal generation in algorithmic A-to-D converters is given as an example application.
Furthermore, two self-test approaches for these building blocks are described and their effectiveness evaluated. Over 3000 single faults have been simulated in HSPICE to obtain the fault coverage using an open/short fault model. The self-test functions are easy to apply, need only a very small overhead and result in fault coverages up to 95% for shorts and 60% for open-circuits.
The analysis of undetected faults revealed that certain circuit structures used in the demonstrators which are common to analogue and mixed-signal designs are practically untestable.