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Issue No.03 - Fall (1995 vol.12)
pp: 24-32
In circuits implementing system level functions, the correctness of the overall operation is critically dependent on the correctness of the control part. Therefore, concurrent error detection techniques for controllers implemented in integrated circuits have previously received wide attention. This paper presents a new technique for concurrent error detection in finite state machine (FSM) controllers. It is based on the use of monitoring machines. In a monitored FSM controller, an auxiliary monitoring machine operates in lock-step with the main FSM, such that any fault in either of the two machines is immediately detected. It is shown how the monitoring machine provides a uniform mechanism for the detection of stuck-at faults as well as delay faults. Besides being less costly than the main machine, it is also not identical to it. These features yield designs which compare very favourably with previous implementations. Not only is the fault coverage higher, also the hardware cost of the monitored sequential circuit is significantly lower.
concurrent error detection, monitoring machines, finite state machine synthesis, fault coverage analysis
Rubin A. Parekhji, G. Venkatesh, Sunil D. Sherlekar, "Concurrent Error Detection Using Monitoring Machines", IEEE Design & Test of Computers, vol.12, no. 3, pp. 24-32, Fall 1995, doi:10.1109/MDT.1995.466370
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