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Designing Self-Timed Devices Using the Finite Automaton Model
Spring 1995 (vol. 12 no. 1)
pp. 14-23
ASCII Text
x 
 
Victor I. Varshavsky, Vyacheslav B. Marakhovsky, Vadim V. Smolensky, "Designing Self-Timed Devices Using the Finite Automaton Model," IEEE Design & Test of Computers, vol. 12, no. 1, pp. 14-23, Spring, 1995.
 
 
BibTex
x
 
@article{ 10.1109/54.350685,
author = {Victor I. Varshavsky and Vyacheslav B. Marakhovsky and Vadim V. Smolensky},
title = {Designing Self-Timed Devices Using the Finite Automaton Model},
journal ={IEEE Design & Test of Computers},
volume = {12},
number = {1},
issn = {0740-7475},
year = {1995},
pages = {14-23},
doi = {http://doi.ieeecomputersociety.org/10.1109/54.350685},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Design & Test of Computers
TI - Designing Self-Timed Devices Using the Finite Automaton Model
IS - 1
SN - 0740-7475
SP14
EP23
EPD - 14-23
A1 - Victor I. Varshavsky,
A1 - Vyacheslav B. Marakhovsky,
A1 - Vadim V. Smolensky,
PY - 1995
VL - 12
JA - IEEE Design & Test of Computers
ER -
 
A procedure of designing a self-timed device defined by the model of finite automaton is suggested. In accordance with the chosen automaton standard implementation structure from the automaton transition/output graph one derives the Signal Graph Specification that then is processed by the formal synthesis procedure for self-timed implementation. The design procedure is illustrated by two examples: Stack Memory and Counter with Constant Acknowledge Delay.
Citation:
Victor I. Varshavsky, Vyacheslav B. Marakhovsky, Vadim V. Smolensky, "Designing Self-Timed Devices Using the Finite Automaton Model," IEEE Design & Test of Computers, vol. 12, no. 1, pp. 14-23, Spring 1995, doi:10.1109/54.350685
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