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Introduction to High-Level Synthesis
October/December 1994 (vol. 11 no. 4)
pp. 44-54
ASCII Text
x 
 
Daniel D. Gajski, Loganath Ramachandran, "Introduction to High-Level Synthesis," IEEE Design & Test of Computers, vol. 11, no. 4, pp. 44-54, October/December, 1994.
 
 
BibTex
x
 
@article{ 10.1109/54.329454,
author = {Daniel D. Gajski and Loganath Ramachandran},
title = {Introduction to High-Level Synthesis},
journal ={IEEE Design & Test of Computers},
volume = {11},
number = {4},
issn = {0740-7475},
year = {1994},
pages = {44-54},
doi = {http://doi.ieeecomputersociety.org/10.1109/54.329454},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Design & Test of Computers
TI - Introduction to High-Level Synthesis
IS - 4
SN - 0740-7475
SP44
EP54
EPD - 44-54
A1 - Daniel D. Gajski,
A1 - Loganath Ramachandran,
PY - 1994
VL - 11
JA - IEEE Design & Test of Computers
ER -
 

The basic problem of high-level synthesis is the mapping of a behavioral description of a digital system into an RTL design consisting of a data path and a control unit. The authors introduce the FSMD model, which forms the basis for synthesis. They discuss the main considerations in a high-level synthesis environment: the input description language, the internal representation, and the main synthesis tasks-allocation, scheduling, and binding. They conclude with some problems that must be solved to make high-level synthesis a widely accepted methodology.

Citation:
Daniel D. Gajski, Loganath Ramachandran, "Introduction to High-Level Synthesis," IEEE Design & Test of Computers, vol. 11, no. 4, pp. 44-54, Oct.-Dec. 1994, doi:10.1109/54.329454
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