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An Asynchronous, High-Speed Packet Switching Component
April/June 1994 (vol. 11 no. 2)
pp. 33-42

The authors discuss the requirements for integrated switching components in a broadband packet-switched telecommunication network. They describe a practical implementation of the resulting complex functionality over a wide range of frequencies within one VLSI chip. After presenting a pragmatic test approach for their highly asynchronous design, their work concludes with test results from a working silicon implementation.

Citation:
Wolfgang O. Budde, Hans-Georg Keller, Hans-Jurgen Reumerman, Paul van de Wiel, "An Asynchronous, High-Speed Packet Switching Component," IEEE Design & Test of Computers, vol. 11, no. 2, pp. 33-42, April-June 1994, doi:10.1109/54.282443
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