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An Asynchronous, High-Speed Packet Switching Component
April/June 1994 (vol. 11 no. 2)
pp. 33-42
ASCII Text
x 
 
Wolfgang O. Budde, Hans-Georg Keller, Hans-Jurgen Reumerman, Paul van de Wiel, "An Asynchronous, High-Speed Packet Switching Component," IEEE Design & Test of Computers, vol. 11, no. 2, pp. 33-42, April/June, 1994.
 
 
BibTex
x
 
@article{ 10.1109/54.282443,
author = {Wolfgang O. Budde and Hans-Georg Keller and Hans-Jurgen Reumerman and Paul van de Wiel},
title = {An Asynchronous, High-Speed Packet Switching Component},
journal ={IEEE Design & Test of Computers},
volume = {11},
number = {2},
issn = {0740-7475},
year = {1994},
pages = {33-42},
doi = {http://doi.ieeecomputersociety.org/10.1109/54.282443},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Design & Test of Computers
TI - An Asynchronous, High-Speed Packet Switching Component
IS - 2
SN - 0740-7475
SP33
EP42
EPD - 33-42
A1 - Wolfgang O. Budde,
A1 - Hans-Georg Keller,
A1 - Hans-Jurgen Reumerman,
A1 - Paul van de Wiel,
PY - 1994
VL - 11
JA - IEEE Design & Test of Computers
ER -
 

The authors discuss the requirements for integrated switching components in a broadband packet-switched telecommunication network. They describe a practical implementation of the resulting complex functionality over a wide range of frequencies within one VLSI chip. After presenting a pragmatic test approach for their highly asynchronous design, their work concludes with test results from a working silicon implementation.

Citation:
Wolfgang O. Budde, Hans-Georg Keller, Hans-Jurgen Reumerman, Paul van de Wiel, "An Asynchronous, High-Speed Packet Switching Component," IEEE Design & Test of Computers, vol. 11, no. 2, pp. 33-42, April-June 1994, doi:10.1109/54.282443
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