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A Method for Consistent Fault Coverage Reporting
July/September 1993 (vol. 10 no. 3)
pp. 68-79

Procedure 5012 of Mil-Std-883, which describes requirements for the logic model, the assumed fault model and universe, fault classing, fault simulation and reporting of test results for digital microcircuits is described. The procedure provides a consistent means of measuring fault coverage regardless of the specific logic and fault simulator used. Procedure 5012 addresses complex, embedded structures such as random-access memories (RAMs), read-only memories (ROMs), and programmable logic arrays (PLAs) weighting gate-level and non-gate-level structures by transistor counts to arrive at overall fault coverage.

Citation:
Warren H. Debany Jr., Kevin A. Kwiat, Sami A. Al-Arian, "A Method for Consistent Fault Coverage Reporting," IEEE Design & Test of Computers, vol. 10, no. 3, pp. 68-79, July-Sept. 1993, doi:10.1109/54.232474
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