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Built-In Self-Diagnosis for Repairable Embedded RAMs
April/June 1993 (vol. 10 no. 2)
pp. 24-33
ASCII Text
x 
 
Robert Treuer, Vinod K. Agarwal, "Built-In Self-Diagnosis for Repairable Embedded RAMs," IEEE Design & Test of Computers, vol. 10, no. 2, pp. 24-33, April/June, 1993.
 
 
BibTex
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@article{ 10.1109/54.211525,
author = {Robert Treuer and Vinod K. Agarwal},
title = {Built-In Self-Diagnosis for Repairable Embedded RAMs},
journal ={IEEE Design & Test of Computers},
volume = {10},
number = {2},
issn = {0740-7475},
year = {1993},
pages = {24-33},
doi = {http://doi.ieeecomputersociety.org/10.1109/54.211525},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Design & Test of Computers
TI - Built-In Self-Diagnosis for Repairable Embedded RAMs
IS - 2
SN - 0740-7475
SP24
EP33
EPD - 24-33
A1 - Robert Treuer,
A1 - Vinod K. Agarwal,
PY - 1993
VL - 10
JA - IEEE Design & Test of Computers
ER -
 

A method of built-in self-diagnosis (BISD) for repairable, embedded static RAMs (SRAMs) is presented. The BISD circuit, with self-repair, requires about 5% extra area in a 64-kb SRAM. The circuit contains a small reduced-instruction-set processor, which executes diagnosis algorithms stored in a ROM. These algorithms employ hybrid serial/parallel operations when external repair is available or modular operations when self-repair is required. The algorithms, hardware design, and design costs and tradeoffs are discussed.

Citation:
Robert Treuer, Vinod K. Agarwal, "Built-In Self-Diagnosis for Repairable Embedded RAMs," IEEE Design & Test of Computers, vol. 10, no. 2, pp. 24-33, April-June 1993, doi:10.1109/54.211525
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