This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Delay-Fault Diagnosis by Critical-Path Tracing
October/December 1992 (vol. 9 no. 4)
pp. 27-32

A delay fault diagnosis process consisting of simulation of the fault-free circuit with a four-valued logic algebra and critical-path tracing from primary outputs to primary inputs is presented. An alternative to fault simulation, the method requires no delay-size-based fault models and considers only the fault-free circuit. A sensitivity analysis process for improving diagnosis accuracy is also presented.

Citation:
Patrick Girard, Christian Landrault, Serge Pravossoudovitch, "Delay-Fault Diagnosis by Critical-Path Tracing," IEEE Design & Test of Computers, vol. 9, no. 4, pp. 27-32, Oct.-Dec. 1992, doi:10.1109/54.173329
Usage of this product signifies your acceptance of the Terms of Use.