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Issue No.04 - October/December (1992 vol.9)
pp: 22-26
ABSTRACT
<p>A signature generation algorithm for linear-feedback shift register (LFSR)-based compactors used in fault simulation of built-in self-test digital circuits is presented. The algorithm uses small- to medium-size lookup tables to generate signatures for internal as well as external exclusive-OR LFSRs of any length. The basic concept can be extended to general linear compactors. Algorithms that convert signatures from one form of LFSR to the other are also presented.</p>
CITATION
Kewal K. Saluja, Chin-Foo See, "An Efficient Signature Computation Method", IEEE Design & Test of Computers, vol.9, no. 4, pp. 22-26, October/December 1992, doi:10.1109/54.173328
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