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Designing a Real-Time Coprocessor for Ada Tasking
January/March 1991 (vol. 8 no. 1)
pp. 67-79

A VLSI coprocessor that radically improves the real-time performance of the Ada tasking model, especially the rendezvous, is discussed. An overview of multilevel design is given, and design levels and models are examined. A description is given of the design strategy, which entails stepwise refinement of functional models representing the coprocessor at more and more detailed levels. A chip was generated using the Genesil silicon compiler, but most of the design was defined and verified on the instruction-set-processor and register-transfer levels.

Citation:
Joachim Roos, "Designing a Real-Time Coprocessor for Ada Tasking," IEEE Design & Test of Computers, vol. 8, no. 1, pp. 67-79, Jan.-March 1991, doi:10.1109/54.75665
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