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Dynamic Functional Testing for VLSI Circuits
November/December 1990 (vol. 7 no. 6)
pp. 42-49

The author discusses the two main problems of dynamic testing (i.e. testing while the simulator is running), namely the design of a high-level vector-generation language and the design of the interface between the vector generator and the simulator. He offers guidelines for designing a high-level vector-generation language as well as several examples written in FHDL, a driver language developed at the University of South Florida. The author also describes a solution to interface design that is based on a special interface data structure that supports several styles of vector generators and interactive circuit debugging.

Citation:
Peter M. Maurer, "Dynamic Functional Testing for VLSI Circuits," IEEE Design & Test of Computers, vol. 7, no. 6, pp. 42-49, Nov.-Dec. 1990, doi:10.1109/54.64956
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