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Embedded Totally Self-Checking Checkers: A Practical Design
July/August 1990 (vol. 7 no. 4)
pp. 5-12

In a totally self-checking (TSC) design, the circuit detects errors by monitoring redundantly coded data/control paths through a TSC checker. A problem arises when not all these code words are on the monitored lines during normal operation. A method of designing checkers that solves this difficulty is proposed. The method uses TSC checkers based on flip-flops instead of using the mostly combinational checkers now available. Two design applications are presented: TSC checkers for arithmetic AN codes, and a TSC iterative logic array.

Citation:
Sandip Kundu, Sudhakar M. Reddy, "Embedded Totally Self-Checking Checkers: A Practical Design," IEEE Design & Test of Computers, vol. 7, no. 4, pp. 5-12, July-Aug. 1990, doi:10.1109/54.57909
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