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Tuning VHDL for Multivalve Logic Modeling
May/June 1990 (vol. 7 no. 3)
pp. 8-10
| ASCII Text | x | ||
| J.R. Armstrong, "Tuning VHDL for Multivalve Logic Modeling," IEEE Design & Test of Computers, vol. 7, no. 3, pp. 8-10, May/June, 1990. | |||
| BibTex | x | ||
| @article{ 10.1109/MDT.1990.10011, author = {J.R. Armstrong}, title = {Tuning VHDL for Multivalve Logic Modeling}, journal ={IEEE Design & Test of Computers}, volume = {7}, number = {3}, issn = {0740-7475}, year = {1990}, pages = {8-10}, doi = {http://doi.ieeecomputersociety.org/10.1109/MDT.1990.10011}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Design & Test of Computers TI - Tuning VHDL for Multivalve Logic Modeling IS - 3 SN - 0740-7475 SP8 EP10 EPD - 8-10 A1 - J.R. Armstrong, PY - 1990 VL - 7 JA - IEEE Design & Test of Computers ER - | |||
Citation:
J.R. Armstrong, "Tuning VHDL for Multivalve Logic Modeling," IEEE Design & Test of Computers, vol. 7, no. 3, pp. 8-10, May-June 1990, doi:10.1109/MDT.1990.10011
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