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Logic Simulation Engines in Japan
September/October 1989 (vol. 6 no. 5)
pp. 40-49

A description is given of HAL II and SP, ultra-high-speed logic simulation engines for use in verifying large computer logic designs. Both use parallel processor architecture with a maximum configuration of 64 processors. The resulting simulation speed is a thousand times faster than that of conventional software logic simulators run on a mainframe. HAL II and SP, which can simulate a system with several million gates, have been used successfully in the design of large digital systems for logic simulation.

Citation:
Shigeru Takasaki, Fumiyaki Hirose, Akihiko Yamada, "Logic Simulation Engines in Japan," IEEE Design & Test of Computers, vol. 6, no. 5, pp. 40-49, Sept.-Oct. 1989, doi:10.1109/54.43078
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