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Scan Design at NEC
May/June 1989 (vol. 6 no. 3)
pp. 50-57
ASCII Text
x 
 
Shigehiro Funatsu, Masato Kawai, Akahiko Yamada, "Scan Design at NEC," IEEE Design & Test of Computers, vol. 6, no. 3, pp. 50-57, May/June, 1989.
 
 
BibTex
x
 
@article{ 10.1109/54.32412,
author = {Shigehiro Funatsu and Masato Kawai and Akahiko Yamada},
title = {Scan Design at NEC},
journal ={IEEE Design & Test of Computers},
volume = {6},
number = {3},
issn = {0740-7475},
year = {1989},
pages = {50-57},
doi = {http://doi.ieeecomputersociety.org/10.1109/54.32412},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Design & Test of Computers
TI - Scan Design at NEC
IS - 3
SN - 0740-7475
SP50
EP57
EPD - 50-57
A1 - Shigehiro Funatsu,
A1 - Masato Kawai,
A1 - Akahiko Yamada,
PY - 1989
VL - 6
JA - IEEE Design & Test of Computers
ER -
 

The authors describe scan path, NEC's implementation of the scan design approach to design for testability. Designers at NEC have found that scan path greatly contributes to the reduced testing and maintenance cost of their products. The authors discuss several implementations of scan design and compare four implementations, including two scan-path techniques.

Citation:
Shigehiro Funatsu, Masato Kawai, Akahiko Yamada, "Scan Design at NEC," IEEE Design & Test of Computers, vol. 6, no. 3, pp. 50-57, May-June 1989, doi:10.1109/54.32412
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