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The V Compiler: Automatic Hardware Design
March/April 1989 (vol. 6 no. 2)
pp. 8-17

The V language describes VLSI systems concisely through the use of sequential algorithmic descriptions. Because V includes high-level constructs such as queues, asynchronous calls, and cycle-blocks, designs are more readily described and optimized into efficient hardware implementations. The implementations can then be tuned for space, time, or other objectives using annotations. From the input description, the V compiler generates both a register-transfer-level specification and a software simulator. Thus, a single description is suitable for both functional simulation and input to logic synthesis. The author describes parsing. scheduling, and resource sharing using the V compiler. He discusses synthesis and simulation, annotations, and high-level constructs.

Citation:
Viktors Berstis, "The V Compiler: Automatic Hardware Design," IEEE Design & Test of Computers, vol. 6, no. 2, pp. 8-17, March-April 1989, doi:10.1109/54.19131
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