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Using Ada as an HDL
January/February 1988 (vol. 5 no. 1)
pp. 30-42
ASCII Text
x 
 
Sumit Ghosh, "Using Ada as an HDL," IEEE Design & Test of Computers, vol. 5, no. 1, pp. 30-42, January/February, 1988.
 
 
BibTex
x
 
@article{ 10.1109/54.669,
author = {Sumit Ghosh},
title = {Using Ada as an HDL},
journal ={IEEE Design & Test of Computers},
volume = {5},
number = {1},
issn = {0740-7475},
year = {1988},
pages = {30-42},
doi = {http://doi.ieeecomputersociety.org/10.1109/54.669},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Design & Test of Computers
TI - Using Ada as an HDL
IS - 1
SN - 0740-7475
SP30
EP42
EPD - 30-42
A1 - Sumit Ghosh,
PY - 1988
VL - 5
JA - IEEE Design & Test of Computers
ER -
 

Ada can be used as both a hardware description language and a distributed simulation environment, which results in a uniform approach to the simulation of digital designs. Ada's synchronization constructs are used in conjunction with techniques for distributed modeling and scheduling to provide a distributed verifier. This technique has been verified for functional and fault simulation and for timing verification. An advantage it has over conventional simulators is that it can execute on a multiprocessor system.

Citation:
Sumit Ghosh, "Using Ada as an HDL," IEEE Design & Test of Computers, vol. 5, no. 1, pp. 30-42, Jan.-Feb. 1988, doi:10.1109/54.669
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