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Multipurpose Parallelism for VLSI Cad on the RP3
September/October 1987 (vol. 4 no. 5)
pp. 19-27
Frederica Darema, IBM Corp
Gregory Pfister, IBM Corp
VLSI CAD application developers need the performance of parallel processing in as general a form as possible. The RP3, whichis being developed at IBM's Research Division, provides such generality. Several CAD applications are among the more than30 applications that have been written in the Epex parallel environment for porting to RP3 when the hardware is complete.Placement by simulated annealing is used here as a significant, deliberately difficult example: its theoretical basis requiresserial execution. In the parallel technique used, deviation from the serial algorithm and temporary errors are allowed formore efficient exploitation of parallelism. The result is a convergence rate as good as the original algorithm, with the possibilityof efficient execution on hundreds of processors.
Citation:
Frederica Darema, Gregory Pfister, "Multipurpose Parallelism for VLSI Cad on the RP3," IEEE Design & Test of Computers, vol. 4, no. 5, pp. 19-27, Sept.-Oct. 1987, doi:10.1109/MDT.1987.295209
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