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| Alexander Miczo, Dipti Mohapatra, Scott Perkins, Katie Kaufman, Ken Huang, "The Effects of Modeling on Simulator Performance," IEEE Design & Test of Computers, vol. 4, no. 2, pp. 46-54, March/April, 1987. | |||
| BibTex | x | ||
| @article{ 10.1109/MDT.1987.295106, author = {Alexander Miczo and Dipti Mohapatra and Scott Perkins and Katie Kaufman and Ken Huang}, title = {The Effects of Modeling on Simulator Performance}, journal ={IEEE Design & Test of Computers}, volume = {4}, number = {2}, issn = {0740-7475}, year = {1987}, pages = {46-54}, doi = {http://doi.ieeecomputersociety.org/10.1109/MDT.1987.295106}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Design & Test of Computers TI - The Effects of Modeling on Simulator Performance IS - 2 SN - 0740-7475 SP46 EP54 EPD - 46-54 A1 - Alexander Miczo, A1 - Dipti Mohapatra, A1 - Scott Perkins, A1 - Katie Kaufman, A1 - Ken Huang, PY - 1987 KW - null VL - 4 JA - IEEE Design & Test of Computers ER - | |||
Gate-level simulators are usually thought of in terms of their benefits to logic designers, while behavioral simulators areconsidered to be the province of system architects. However, the behavioral modeling capabilities of a multilevel gate/behavioralsimulator significantly enhanced the performance and accuracy of what are essentially gate-level simulations. The Behave simulatoris a multilevel simulator that can simulate circuits at several levels of abstraction?behavioral level, gate level, or a mixture.Zero delay and rank order capability are also available in Behave and can be used to advantage. For example, in a simulationof an array multiplier involving 10,000 vectors, the time decreased from 16 hours to 38 minutes, simply because the elementswere rank ordered. This range of processing is possible because of the flexibility in software for general-purpose CPUs.
Citation:
Alexander Miczo, Dipti Mohapatra, Scott Perkins, Katie Kaufman, Ken Huang, "The Effects of Modeling on Simulator Performance," IEEE Design & Test of Computers, vol. 4, no. 2, pp. 46-54, March-April 1987, doi:10.1109/MDT.1987.295106
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