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Issue No.01 - January/February (1987 vol.4)
pp: 42-51
Kewal Saluja , University of Wisconsin
Siew Sng , Reliability Singapore
Kozo Kinoshita , Hiroshima University
ABSTRACT
The article investigates the design of a built-in self-testing RAM as an economical way, in terms of silicon area overhead,to test memories?more economical than the use of external testers. The design of a BIST static RAM is given, along with designdecisions, retrospectives on how design could have used the area even more efficiently, and results of implementation. Theextra silicon area used by the BIST hardware for 64K static memories is only five percent; for larger memories, it is less.BIST RAM, then, is a practical alternative, especially since testing can be done even during burn-in without the aid of anexpensive external tester.
INDEX TERMS
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CITATION
Kewal Saluja, Siew Sng, Kozo Kinoshita, "Built-In Self-Testing RAM: A Practical Alternative", IEEE Design & Test of Computers, vol.4, no. 1, pp. 42-51, January/February 1987, doi:10.1109/MDT.1987.295113
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