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Teradyne's J967 VLSI Test System: Getting VLSI to the Market on Time
November/December 1985 (vol. 2 no. 6)
pp. 57-62
Wayne Ponik, Teradyne, Inc.
The J967 is the newest of Teradyne's J900 series of VLSI test systems. It provides flxible timing and formating; fact accurateparametric tests; and automatic calibration to devices with fewer than 200 leads and bus speeds of up to 20 MHz. The 36 timinggenerators and 1024 timing sets reduce the need for multiple passes or multiple programs to test a device. The J967's intergratedsoftware includes the Berkeley 4.2BSD Unix operating system, T900 test language, automatic data loging, a test analysis program,and Testsim, a software simulation of the J967 for offline debuging.
Citation:
Wayne Ponik, "Teradyne's J967 VLSI Test System: Getting VLSI to the Market on Time," IEEE Design & Test of Computers, vol. 2, no. 6, pp. 57-62, Nov.-Dec. 1985, doi:10.1109/MDT.1985.294800
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