CSDL - IEEE Design and Test of Computers

MCNC Releases the VIVID System (PDF)

pp. c2

Our Logic Simulator Will Help You Make It through the next Revolution (PDF)

pp. 1

Is LASAR Logic Simulation Best? Take This Test (PDF)

pp. 2-3

IEEE Computer Society (PDF)

pp. 4

Editorial Board (PDF)

pp. 5

Advertisement (PDF)

pp. 6

100% VLSI Fault Grading Is No Longer an Imaginary Goal. It's a Reality (PDF)

pp. 7

From the Editor-in-Chief (PDF)

pp. 8-9

D&T Scene (PDF)

pp. 10-15

Structure Level Tools (PDF)

pp. 16

Design Automation for the Right Side of the Brain (PDF)

pp. 17

The Economics of Test (PDF)

pp. 18-19

Low-Cost Testers: Are They Really Low Cost? (Abstract)

G. Bowers, IBM Corporation

B. Pratt, IBM Corporation

pp. 20-28

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A Basis for Setting Burn-in Yield Criteria (Abstract)

Anthony Van Den Heuvel, Motorola, Inc.

Noshir Khory, Motorola, Inc.

pp. 29-34

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Proceedings 1984 ACM IEEE Design Automation Conference (PDF)

pp. 34

A Fault-Driven, Comprehensive Redundancy Algorithm (Abstract)

John Day, Teradyne, Inc.

pp. 35-44

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IEEE Design&Test of Computers (PDF)

pp. 44

Exploratory Data Analysis for Semiconductor Manufacturing (Abstract)

Dean Bandes, LTX Corporation

pp. 45-55

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1984 IEEE Workshop on Languages for Automation November 1-3,1984 (PDF)

pp. 55

Codec Testing Using Synchronized Analog And Digital Signals (Abstract)

Douglas Shirachi, Zehntel Automation Systems

pp. 56-63

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Goalie: A Space Efficient System for VLSI Artwork Analysis (Abstract)

Thomas Szymanski, AT&T Bell Laboratories

Christopher Van Wyk, AT&T Bell Laboratories

pp. 64-72

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D&T Interview (PDF)

pp. 73-80

D&T Conferences (PDF)

pp. 81-86

1984 Academic Forum for Test Technology October 19, 1984 (PDF)

pp. 86

D&T Research (Abstract)

pp. 87-100

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Proceedings: 1984 International Test Conference, October 1984 (PDF)

pp. 100

New Products Test (PDF)

Conrad Zagwyn, LTX Corp., LTX Park at University, Westwood, MA 01090.

pp. 101-103

New Products Design (PDF)

J. Nash, Raytheon Co., Missile Systems Div., Hartwell Rd., Bedford, MA 01730.

pp. 104-107

Moving? (PDF)

pp. 106

Calendar (PDF)

pp. 108-109

Call for Papers (PDF)

pp. 109

Book Reviews (PDF)

Robert Anderson, GenRad Inc., PO Box 32183, Phoenix, AZ 85064.

pp. 110-110-a

Selected Reprints on Logic Design for Testability 1984 (PDF)

pp. 110-a

Advertiser Index?June 1985 (PDF)

pp. 110-b

IEEE Design&Test of Computers (PDF)

pp. 110-c-110-d

Merlyn-G Automated Layout System Joins the RCA Megaforce? (PDF)

pp. 110-e

Following a Design Engineer around on a Typical Day Can Lead to Only One Conclusion (PDF)

pp. 110-f