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Ianus: An Adaptive FPGA Computer
January/February 2006 (vol. 8 no. 1)
pp. 41-49
Francesco Belletti, University of Ferrara
Filippo Mantovani, University of Ferrara
Giorgio Poli, University of Ferrara
Sebastiano Fabio Schifano, University of Ferrara
R. Tripiccione, University of Ferrara
Isabel Campos, Institute of Biocomputation and Physics of Complex Systems
Andres Cruz Flor, University of Zaragoza
Denis Navarro, University of Zaragoza
Sergio Perez Gaviro, University of Zaragoza
Daniele Sciretti, University of Zaragoza
Alfonso Tarancon, University of Zaragoza
Jos? Luis Velasco, University of Zaragoza
Pedro Tellez, University of Zaragoza
Luis Antonio Fernandez, Universidad Complutense de Madrid
Victor Martin-Mayor, Universidad Complutense de Madrid
Antonio Munoz Sudupe, Universidad Complutense de Madrid
Sergio Jimenez, University of Roma
Andrea Maiorano, University of Roma
Enzo Marinari, University of Roma
Juan Jesus Ruiz-Lorenzo, University of Extremadura
With Ianus, a next-generation field-programmable gate array (FPGA)-based machine, the authors hope to build a system that can fully exploit the performance potential of FPGA devices. A software platform that simplifies Ianus programming will extend its intended application range to a wide class of interesting and computationally demanding problems.
Index Terms:
spin glass, special purpose machine, special computers, programmable logic
Citation:
Francesco Belletti, Filippo Mantovani, Giorgio Poli, Sebastiano Fabio Schifano, R. Tripiccione, Isabel Campos, Andres Cruz Flor, Denis Navarro, Sergio Perez Gaviro, Daniele Sciretti, Alfonso Tarancon, Jos? Luis Velasco, Pedro Tellez, Luis Antonio Fernandez, Victor Martin-Mayor, Antonio Munoz Sudupe, Sergio Jimenez, Andrea Maiorano, Enzo Marinari, Juan Jesus Ruiz-Lorenzo, "Ianus: An Adaptive FPGA Computer," Computing in Science and Engineering, vol. 8, no. 1, pp. 41-49, Jan.-Feb. 2006, doi:10.1109/MCSE.2006.9
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