JULY 2008 (Vol. 41, No. 7) p. 4
0018-9162/08/$31.00 © 2008 IEEE
Published by the IEEE Computer Society
Published by the IEEE Computer Society
In Praise of Scripting: Real Programming Pragmatism
Ronald P. Loui
The academic programming language community continues to reject the change in programming practices brought about by scripting, remaining deaf to John K. Ousterhout's assertion that scripting can provide higher-level programming for the 21st Century.
That scripting has developed in the shadow of object-oriented programming explains part of the problem. The two can be compatible, but one philosophy has received the most attention, with scripting appearing language by language. Ousterhout declared scripting on the rise, but perhaps so too are programming language pragmatics.
Efficient Embedded Computing
William J. Dally, James Balfour, David Black-Shaffer, James Chen, R. Curtis Harting, Vishal Parikh, Jongsoo Park, and David Sheffield
Embedded computing applications demand both efficiency and flexibility: The bulk of computation today happens not in desktops, laptops, or data centers, but in embedded media devices. More than a billion cell phones are sold each year, and a 3G cell phone performs more operations per second than a typical desktop CPU.
Demanding performance and efficiency requirements drive most media devices to perform their computations with hardwired logic in the form of an application-specific integrated circuit. While ASICs meet embedded applications' energy-efficiency demands, they are difficult to design and inflexible. Increasingly, embedded applications demand both flexibility and efficiency.
Amdahl's Law in the Multicore Era
Mark D. Hill and Michael R. Marty
Computing vendors' road maps promise multiple processor cores that will double the number of cores per chip repeatedly. Yet designers must subdue more degrees of freedom for multicore chips than for single-core designs. Amdahl's law shows that this model has important consequences for the multicore era. Sources as varied as Intel and the University of California, Berkeley, predict designs of a hundred, if not a thousand, cores.
The authors offer a corollary of a simple model of multicore hardware resources. Their results should encourage multicore designers to view the entire chip's performance rather than focusing on core efficiencies. They also describe several important limitations of their models to stimulate discussion and future work.
Warp Processing: Dynamic Translation of Binaries to FPGA Circuits
Frank Vahid, Greg Stitt, and Roman Lysecky
Computations might execute faster as circuits on a field-programmable gate array (FPGA) than as sequential instructions on a microprocessor because a circuit allows concurrency, from the bit to the process level. Several tools seek to compile popular microprocessor-oriented software programming languages to FPGAs. Key barriers to adoption include the difficulty of integrating such tools into established microprocessor software development flows and such tools' nonconformance to the standard binary concept that forms the basis of many computing domains' ecosystems.
In warp processing, a compute platform transparently performs FPGA circuit compilation as a program's binary executes on a microprocessor.
Automating Postsilicon Debugging and Repair
Kai-hui Chang, Igor L. Markov, and Valeria Bertacco
Increasing semiconductor design complexity lets more errors escape presilicon verification, to be discovered only later in prototype chips. While most steps in the IC design flow are highly automated, researchers have devoted little effort to the postsilicon debugging process, making it difficult and ad hoc.
The author's proposed FogClear methodology, powered by novel techniques that integrate logical, spatial, and electrical considerations, systematically automates this process. Empirical results indicate that FogClear's key components—PAFER, PARSyn, SymWire, and SafeResynth—repair numerous functional and electrical errors in most benchmarks, demonstrating their effectiveness in postsilicon debugging.
SIISAM: A Model for Secure Inhomogeneous Information Systems
Kun Wang, Zhonghai Yin, Lihua Zhou, Feng Yuan, and Zengxin Li
Researchers in China's E-Government Experimental and Demonstration Project have created the secure inhomogeneous information system architecture model. SIISAM provides security-critical services as well as local fault and disaster recovery to ensure continuous service; uses Web service technology to support interoperability and extensibility; and is a layered rather than a process-driven model that can more flexibly accommodate changes in applications, thereby facilitating system design, development, and deployment.