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Emerging Nanoscale Memory and Logic Devices: A Critical Assessment
May 2008 (vol. 41 no. 5)
pp. 28-32
James A. Hutchby, Semiconductor Research Corp.
Ralph Cavin, Semiconductor Research Corp.
Victor Zhirnov, Semiconductor Research Corp.
Joe E. Brewer, University of Florida
As the semiconductor industry pursues increased functional density and performance, an ITRS working group considers the long-term potential of emerging nanodevices to replace ultimately scaled CMOS logic or memory device technology.

1. "Emerging Memory and Logic Devices—A Critical Assessment," International Technology Roadmap for Semiconductors: 2007 Edition, L. Wilson, ed., 2008, pp. 30–36.
1. V.V. Zhirnov et al., "Limits to Binary Logic Switch Scaling—A Gedanken Model," Proc. IEEE, Nov. 2003, pp. 1934–1939.

Index Terms:
ITRS, CMOS, MOSFET, nanotechnology, memory, logic
James A. Hutchby, Ralph Cavin, Victor Zhirnov, Joe E. Brewer, George Bourianoff, "Emerging Nanoscale Memory and Logic Devices: A Critical Assessment," Computer, vol. 41, no. 5, pp. 28-32, May 2008, doi:10.1109/MC.2008.154
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